Aarushe Mahajan
Summary
Experienced Physical Verification Engineer with expertise in SoC and block-level design verification across advanced process nodes (22nm, 12nm, 6nm, 4nm). Strong background in DRC/LVS debugging, semiconductor fabrication, and industry-standard EDA tool. Passionate about problem-solving, automation, and continuous improvement to enhance product quality and efficiency.
Overview
4
4
years of professional experience
1
1
Certification
Work History
Physical Verification Sign-off Engineer
MediaTek
07.2021 - Current
- Spearheaded SoC verification for smartphone and Wi-Fi projects across multiple process nodes (22nm, 12nm, 6nm, 4nm)
- Diagnosed and resolved power/ground shorts in block-level and full-chip layouts
- Proficient in DRC, LVS debugging, and semiconductor verification processes
- Partnered with Physical Design and Packaging teams to maintain verification standards, helping resolve flow and PV issues
- Engineered a Python-based script to automate calculations, resolve DRC violations, and streamline file editing processes, significantly reducing manual effort and improving efficiency
- Actively mentored colleagues and junior team members by providing clear explanations of workflow processes and assisting them with their tasks.
- Facilitated knowledge sharing and skill development to foster a collaborative and efficient team environment.
Education
Master of Science - Electronics
Nanyang Technological University
06-2020
Bachelor of Science - Hons in Physics
University of Delhi
06-2019
Skills
- Python
- EDA Tools : Calibre, ThunderView, Cadence Virtuoso
- C
- TCL
- UNIX/Linux
- DRC/LVS debugging
- Power/ground, Signal shorts resolution
- Strong problem-solving and debugging abilities
- Collaboration with cross-functional teams
- Continuous learning and process improvement
Certification
- Mathematics for Machine Learning, COURSERA (Imperial College London)
- Python Programming and Python Data Structures, COURSERA (University of Michigan)
Languages
English
Bilingual or Proficient (C2)
Spanish
Intermediate (B1)
Hindi
Bilingual or Proficient (C2)
Timeline
Physical Verification Sign-off Engineer
MediaTek
07.2021 - Current
Master of Science - Electronics
Nanyang Technological University
Bachelor of Science - Hons in Physics
University of Delhi
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