Summary
Overview
Work History
Education
Skills
Software and Tools
Timeline
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Vinoth Vijayakumar

Technical Specialist
34/27 New Fire Wood Bank Street, Triplicane

Summary

Enthusiastic software engineer with 12+ years of experience, eager to contribute to team success through hard work, attention to detail and excellent organizational skills. Clear understanding of requirements, design and coding and training in Linux embedded applications. Proficient in C and Linux platform.

Overview

14
14
years of professional experience
18
18
years of post-secondary education

Work History

Technical Specialist

HCL
11.2022 - Current
  • Working on Meta Inference chip set evaluation and testing
  • Reviewed technical documents and collaborated on customised design to achieve new development in chipset.
  • Enabled Multicore CPU processing in the MediaAccelerator AI chipset.
  • Monitoring and lead the team

Staff Enginner

Seagate Technologies,
06.2021 - 10.2022
  • Worked on Cortx open source, motr module which is core of object storage. https://github.com/Seagate/cortx-motr
  • Explored and worked on kubernetes Pod for cortx-motr services
  • Worked on net layer (libfabric) of cortx-motr
  • Identified issues, analyzed information and provided solutions to problems.
  • Carried out day-to-day duties accurately and efficiently.

Technical Lead Engineer

Msys Technologies
11.2018 - 05.2021

Working in software-defined data center which offers patented erasure coding, distributed scale-out architecture, and advanced Quality of Service (QoS) engine to consolidate multiple mixed workloads while prioritizing performance and data protection to applications.

Responsibilities:

  • Working in Open source development for seagate which uses lustre operating system and object storage.
  • Working on developing libfabric network interface for the open source cortx-motr
  • Developed phone home feature in Hyperconverged infrastructure
  • Experience with SAN and object storage concepts

Module Leader

NEC India Pvt Ltd
07.2016 - 10.2018

Radio Transparent clock feature for VR series

iPASOLINK, Advanced mobile back haul network with high-capacity transmission and TDM-IP hybrid network. Developed transparent clock feature in radio module, which is used to achieve time synchronization in Nano seconds between one hop networks. (Confining to RFC IEEE1588v2 protocol)

Responsibilities:

  • Developed and architect "ODU" as part of FCAPS related to iPASOLINK series.
  • Developed and architect "Space diversity" support to 5000ip and 7000p radio firmware.
  • Developed and architect "High Modulation QAM" for higher bandwidth.
  • Develop and architect "New Modem" support.
  • Organized training for new members and provided platform for seamless development.
  • Working in all phases starting from System Requirement Specification to Integration Testing for product.

Achievements

  • NEC Excellence award for releasing bug free project “Longhaul Series”
  • 100% DQA Judgement by Japan quality team which is first Telecom for Mobile Backhaul product.

Associate Module Lead

NEC India Pvt Ltd
07.2014 - 06.2016

Microwave Wireless access( iPASOLINK 400/400A/1000)

Back-haul devices leads microwave radio industry with rich features and outstanding capacities. As high performance device, it is capable of high capacity transport with optical and microwave, for true carrier-grade converged node experience.

Responsibilities:

  • Analyzed and Handled endianness correctness due to migration of PPC and ARM platform
  • Developed and re-distributed "Makefile" for complete code base compilation
  • Built kernel module, workspace, and rootfs in WRL – 4.3 for ARM Board

Achievements

  • Individually analyzed kernel module and solved ramswap driver
    memory issue
  • Extra-miler award for contribution of platform porting which took almost year to complete

Associate Module Lead

NEC India Pvt Ltd
12.2012 - 06.2014

iPASOLINK EX ( XPIC Feature development )

Responsibilities:

  • Created Detail design specification, by plotting state machine diagram for xpic feature
  • Attend requirement collection workshop in Japan for XPIC project.
  • Single point of contact between team and client (NEC Japan)
  • Monitor and improve performance of team.

iPASOLINK EX (redundancy Feature)

Responsibilities:

  • Create Integration test plan of Redundancy feature by understanding Basic design and Requirement specification.
  • Created simulation for redundancy feature using Cunit Frame work.
  • Provided complete IT cases of 800+ cases in months time frame.

Software Engineer

Tech Mahindra Ltd
03.2010 - 12.2012

Cisco Set top box Development

Cisco Scientific Atlanta is a supplier of transmission networks for broadband access to home, set-top cable boxes, cable modems and digital interactive subscriber systems for video, high-speed Internet, voice over IP (VoIP) networks.

Responsibilities:

  • Implementing IPC mechanism between layers of setup box.
  • Prototyping of Dbus
  • Porting of Dbus to set top box and check feasibility test

Multicom 2nd Generation Administrative Communication System

Bogen’s Quantum Multicom IP / Multicom 2000 Administrative Communications System is comprehensive communications network that connects administrative areas and staff locations in a single building, multiple building sites throughout a campus using VoIP.

Responsibilities:

  • Feature enhancement like missed call, Dialer log.
  • Bug fixes of all Modules in MC2G system.
  • Setting up real-time env of lab, which include flashing of micro controllers.
  • Complete process control management for product delivery cycle (water-fall).

Achievements

  • “Rising Start “award for understanding and implementing “Dbus” successfully in set top box in short development period.
  • “Valuable team player” award Bogen development @ Tech Mahindra Ltd.

Education

Bachelor of Electrical And Electronics Engineering - EEE

Sri SaiRam Engineering College
Chennai
07.2005 - 05.2009

12th Std ( High School ) -

Santhome Higher Secondary School, HSC
Mylapore
06.2003 - 04.2005

10th Std -

Hindu Senior Secondary School, CBSE
Chennai
06.1991 - 04.2003

Skills

Advanced knowledge in C

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Software and Tools

Github, memory analyzers - memleax, trace32, valgrind, jproc

Open Embedded, bitbake, Rational Clear Quest, Gitlab,

Coverity, Jenkins, Mercurial scm, RTC and Clearcase.

GDB, Source Insight, MS Office Tools, Wind River Linux

Timeline

Technical Specialist

HCL
11.2022 - Current

Staff Enginner

Seagate Technologies,
06.2021 - 10.2022

Technical Lead Engineer

Msys Technologies
11.2018 - 05.2021

Module Leader

NEC India Pvt Ltd
07.2016 - 10.2018

Associate Module Lead

NEC India Pvt Ltd
07.2014 - 06.2016

Associate Module Lead

NEC India Pvt Ltd
12.2012 - 06.2014

Software Engineer

Tech Mahindra Ltd
03.2010 - 12.2012

Bachelor of Electrical And Electronics Engineering - EEE

Sri SaiRam Engineering College
07.2005 - 05.2009

12th Std ( High School ) -

Santhome Higher Secondary School, HSC
06.2003 - 04.2005

10th Std -

Hindu Senior Secondary School, CBSE
06.1991 - 04.2003
Vinoth VijayakumarTechnical Specialist