Viet Anh Nguyen

Learn and accumulate knowledge, cultivate skills in the field of RTL design to bring positive values , contribute to IC design development, and promote the development of RTL design skills and production to meet market needs.

ML/AI/DL, COLE VN, 2023

• Third Prize of Provincial Science and Technology Competition (Binh Duong), 2022
• Silver Medal at the 2022 Thailand International Mathematical Olympiad (TIMO) National Competition, 2022

• 8-Points FFT Calculator
  Duration: 03/2023 – 05/2023
  Description: Designed and simulated a hardware FFT module (Stage 2) with butterfly units and complex multipliers.
  Responsibilities:
  . Developed RTL using Verilog
  . Created testbench and verified functionality via simulation (Xilinx ISE)
  . Analyzed waveform and debugged logic
  
• 8T SRAM Design
  Duration: 10/2024 – 10/2024
  Description: Designed a traditional 8T SRAM cell and constructed a 32×32 memory array.
  Responsibilities:
  . Built and described functional blocks
  . Simulated read/write operations
  . Evaluated latency and power using Cadence Virtuoso (GPDK 90nm)
  
• Dual-mode NRZ/PAM4 SerDes (Ongoing)
  Duration: 01/2025 – Present
  Description: Designed a high-speed SerDes supporting NRZ and PAM4 encoding for data transmission.
  Responsibilities:
  . Developed Verilog modules for encoder/decoder
  . Integrated with real transmission channels on FPGA boards
  . Simulated signal integrity and measured throughput