Tang Li Ping
Summary
A self-motivated and result oriented professional with a unique blend of broad engineering and operations experience in Semiconductor industry for 15 years. Reliable individual, possessing experience in dynamic and fast pace working environment. Coordinating cross-functional projects to meet operational demands and timeline, hands on with very positive working attitude, eager to learn new things with passion to win spirit. I wish that I could have chance to contribute my knowledge and efforts to your organization.
Overview
20
20
years of professional experience
Work History
Process Integration Engineer
SSMC
09.2021 - Current
- New device tape-out (single or MPW), , in charge of multiple products overall yield performance and improvements(18EFlash/152GPIIA/18GPIIA)
- Process margin optimization through DOE runs
- Actively monitor inline and offline KPIs to ensure product yield performance (WAT OOC, CPK for ET and inline SPC parameters)
- Identify yield improvement opportunities and set preliminary yield targets
- Identify and resolve process integration issues and ET related problems
- Customer engineering support
- Achievement Lead 152GPIIA product yield improvement project (96.2% to 97.6%) through NLDD implant dose optimization
- Achieved $185K annual cost benefit
- Lead18GPIIA product yield improvement from 93.8% to 95.1% through PO uniformity improvement to reduce bin failure rate. Achieved varies products’ CPK improvement through co-work with module engineering and WAT testing team.
- Reviewed processes, identifying areas requiring improvement
- Provided technical assistance to production team when issues arose
- Conducted root cause analysis to identify, prioritize and eliminate process losses
- Participated in project reviews to enable ongoing status tracking and reporting
- Developed documentation, diagrams, and specifications to meet project requirements and regulatory standards
Principal assistant process engineer
TD
09.2017 - 08.2021
- PI
- New device tape-out (Route build and Spec Book creation)VM eFlash new products transfer
- Overall coordinator for metrology related changes
- Spec Control and Yield improvement
- Process route creation and update
- Engineering material planning and execution
- Coordinate TEM, ENG wafers Planning and shipment
- Support PCRB for 55NVM related changes and low yield case
- Troubleshooting of process issue
- Achievement On time delivery of new tape out
- Successfully transferred new products to fab7
- Successfully managed all metrology recipes transfer and creation for new products
- Yield improvement vary from 0.5% to 3% for 55NVM products
- Zero case of engineering resources shortage
- PCRB timely delivery for 9 months
Senior assistant process engineer
TD
06.2014 - 08.2017
- Litho
- Daily TD-Litho line issue handling
- Owner of TD litho metrology recipes management—CDSEM, OVL, OCD
- TD-Litho overall SPC improvement project leader
- New resist qualification
- Overall TD-Litho hold lot disposition improvement
- Achievement
- TD-litho hold lot rate reduced by 23% in 2 years
- SPC charts OOS/OOC trending down for 6 months consecutively
- On time delivery of new products qualification at litho processes
- Qualified 3 new resist successfully
- Trained and mentored competent and flexible workforce to meet project needs and promote positive work environment
- Provided input to team lead regarding areas for process and procedural improvement
Manufacturing –Trainer
SMIC, BJ
02.2008 - 01.2010
- Overall training for fab 6S
- Weekly/Monthly fab 6S performance report for management team
- Weekly management fab 6S line walk
- In charge key-in center
- Achievement
- Successfully raise the overall 6S awareness and fab performance by 15%
- Zero miss case of RC management from key-in center
Manufacturing -Litho Line leader
Jannary, SMIC, BJ
01.2004 - 02.2008
- Daily production planning and execution
- Manage daily line issues with Module EE/PE for MFG-Litho area
- CDSEM tools matching qualification and CDEM recipe optimization
- Trainer of CDSEM/OVL machines for all new hires
- Litho photo resist auto management system setup
- Litho T/W management for cost saving
- Overall training for Litho technicians
- Achievement achievement of monthly move targets for Litho area and key stages
- CDSEM overall capacity improvement 5% and cycle time reduction 10%
- Zero miss operation for Litho resist change in my shift
- CW cost saving at $600k yearly
- New technician’s certification rate at 100% within 3 months
Education
Bachelor of Science - EEE
National University of Singapore
Singapore05.2022
Diploma - ELECTRONICS ENGINEERING
Ngee Ann Polytechnic
Singapore06.2014
Skills
- Computer
- Proficient in
- Microsoft Word, Microsoft Excel, Microsoft PowerPoint
- SQL language for report purpose
- Availability : 2 Month Notice
Timeline
Process Integration Engineer
SSMC
09.2021 - Current
Principal assistant process engineer
TD
09.2017 - 08.2021
Senior assistant process engineer
TD
06.2014 - 08.2017
Manufacturing –Trainer
SMIC, BJ
02.2008 - 01.2010
Manufacturing -Litho Line leader
Jannary, SMIC, BJ
01.2004 - 02.2008
Bachelor of Science - EEE
National University of Singapore
Diploma - ELECTRONICS ENGINEERING
Ngee Ann Polytechnic
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