Say hello here! My name is Miao Sun. I am currently a Research Fellow in the College of Electrical and Electronic Engineering at Nanyang Technological University (NTU), Singapore. I received my PhD in Autumn 2023 from the School of Microelectronics at Fudan University, where I was mentored by Prof. Patrick Yin Chiang. My research focuses on digital circuit and system design for SPAD (Single-Photon Avalanche Diode)-based imaging platform and depth completion technology. Following a year dedicated to advancing metalens-based LiDAR imaging systems at NTU, I am eager to explore further opportunities in digital circuit design. I am actively seeking academic roles that focus on digital system design, digital processing, and near-sensor applications. Passionate about pushing the boundaries of chip design, I aim to collaborate with leading experts in integrated circuits worldwide. I am open to discussions and would appreciate any recommendations!
Title: Research and Design of SPAD and depth completion Technology based LiDAR Chip and System.
Supervisors: Dr. Patrick Yin Chiang
Grade: CGPA: 3.42
Honor: Outstanding Graduates from Fudan University
Title: Circuit implementation of digitally programmable transconductance amplifier in analog simulation of reaction-diffusion neural model.
Grade: CGPA: 3.81
Honor: Outstanding Graduates from Chongqing
During her doctoral studies, Dr. Sun specialized in the design and implementation of a dedicated accelerator chip for deep sensor imaging algorithms. As the lead author, I developed a dToF (direct time-of-flight) depth completion accelerator, successfully fabricating and validating it using the 40nm process technology from Semiconductor Manufacturing International Corporation (SMIC). My research was published in the journal TCAS-II. Additionally, I proposed a novel single-point imaging system based on dToF. This system utilized monocular depth imaging algorithms derived from RGB images to precisely reconstruct depth images from the full histogram produced by the depth sensor, marking a unique advancement in single-point depth sensor imaging.
Working as the designer and architect of the deep completion accelerator SoC. Be responsible for evaluating the feasibility of network quantification, proposing the dedicated hardware acceleration scheme, and participating in the front-end design. Collaborating with the SPAD imaging team to combine a 32x32 SPAD array with a neural network to achieve depth completion for VGA-resolution depth images. I am also responsible for the training and quantization of the depth completion neural network and designing the hardware structure of accelerators. For non-convolutional operations, I introduce a RISC-V core with vector accelerators to process them. Finally, it has been verified through chip type out and real-time imaging can be achieved, which is currently the only acceleration work in the depth correction application track for LiDAR.
Be responsible for the proposal of ideas, the scheme design of the single point imaging system, the evaluation of accelerator network structure, and participating in front-end design work. In this work, the 256 SPADs from a 16x16 dToF sensor were combined to capture global depth information and the prediction result of the depth estimation neural network in monocular imaging was improved to output a more accurate depth image. Ultimately, the system achieved real-time imaging of 228x304 resolution. After the experimental measurements, it has achieved leading imaging results compared to the current most SOTA depth estimation algorithms and high-resolution LiDAR.
Journals