JUN YING ONG
STAFF PHYSICAL DESIGN ENGINEER
Summary
Experienced Physical Design Engineer with 8+ years in ASIC Design.
Experience working in a fast-paced environment, great adaptability to changes.
Interested in long-term career growth, developing skills in the physical design field and platforms expose to new knowledge.
Overview
9
9
years of professional experience
7
7
years of post-secondary education
3
3
Languages
Work History
STAFF PHYSICAL DESIGN ENGINEER
Mediatek
03.2022 - Current
- Work on APU design with the latest TSMC process node.
- Utilized state-of-the-art EDA tools to perform detailed place-and-route operations for multi-million gate designs successfully.
- Resolved complex physical design issues promptly, minimizing delays in project timelines while maintaining high standards of workmanship.
- Identified and resolved critical issues in layout routing, significantly improving overall design robustness.
- Developed custom scripts for improved design flow efficiency, boosting productivity within the team.
- Successfully tape-out track record in various advanced technology nodes (N3,N3E,N3P).
SoC Design Engineer
Intel
03.2018 - 03.2022
- Work on Intel Client SoC with latest Intel/TSMC process technology in the era of hyper scale computing
- Responsible for SoC global clock planning and distribution to the various customer across various project.
- Involve in clock route planning and implementation, clock spine design, simulation, clock balancing, timing analysis, physical verification (DRC/LVS), checker enhancement, TCL scripting for design modification etc.
- Actively collaborate/handshake with frontend, integration team and BE design team throughout the project to ensure successfully project tape in.
- Expose to EDA tools fusion compiler, icc2, primetime.
Internship
Besmic Optics
02.2016 - 05.2016
- Work under a technical support engineer provide metrology solution for inspection for different vendor
- Expose to inspection and measurement machine modification, design, and calibration
- Helping provide technical training to vendor employee
Education
Master of Engineering - Computer and Microelectronics system
Universiti Teknologi Malaysia
01.2017 - 01.2019
Bachelor of Electrical and Electronics Engineering - with Honours
Tunku Abdul Rahman College
01.2014 - 01.2017
Diploma in Electrical and Electronic Engineering - undefined
Tunku Abdul Rahman University College
01.2012 - 01.2014
Skills
VLSI design
Clock distribution and planning
Scripting
VLSI Design
Layout Design
Floor Planning
undefinedTimeline
STAFF PHYSICAL DESIGN ENGINEER
Mediatek
03.2022 - Current
SoC Design Engineer
Intel
03.2018 - 03.2022
Master of Engineering - Computer and Microelectronics system
Universiti Teknologi Malaysia
01.2017 - 01.2019
Internship
Besmic Optics
02.2016 - 05.2016
Bachelor of Electrical and Electronics Engineering - with Honours
Tunku Abdul Rahman College
01.2014 - 01.2017
Diploma in Electrical and Electronic Engineering - undefined
Tunku Abdul Rahman University College
01.2012 - 01.2014
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