Amir Hamzah Mohamad
Reject Validation Engineer
Summary
Passionate engineer with 10 years of experience in Failure Analysis (FA) field. Specialized in Fault Isolation (FI), Intel Process & Automated Test Equipment testing. Proven track record in FAFI support in cross-functional teams with countless cases solved. Ready to bring forward exceptional expertise and eager to explore new experience in semiconductor field.
Overview
10
10
years of professional experience
Work History
Reject Validation Engineer
Intel Microelectronics Sdn Bhd
04.2024 - Current
- Focused on direct FA (DFA) methodology to improve DFA baseline rate.
- Involved in ARLS & GND DFA improvement activities as preparation for actual Tyche product. Established POC on ARLS with enhanced DFA baseline rate up to ~60%.
- Path find on new array content development for engineering data collection. Proliferate learnings & capability to FA partners.
- Performed automation on pattern generation using Python script.
Failure Analysis Engineer
Intel Technology Sdn Bhd
03.2015 - 03.2024
- Well versed in FAFI methodologies particularly on array, functional, scan & fuse with extensive experience working with optical tools such as IREM, LADA, LVX, etc.
- Proficient at device testing & characterization using HDMT & SBTS tester. Knowledgeable in test program & data collection such as raster, spofi, shmoo.
- Adept at FI techniques such as RTL tracing, schematic & layout analysis to form FI boundary for FA work.
- Led sort yield improvement & excursion through FAFI coordination across sites & teams.
- Developed engineering data collection test program for in-depth electrical characterization at Singulated Die Sort (SDS) level for direct FA approach.
- Supervised Logic FI Ops to ensure smooth FAFI support & oversaw jobs operation from various backgrounds - Sort, Class, PPV, Qual, FACR, etc.
- Contributed to several high profile jobs such as sort line down P1 job, Server Silent Data Error (SDE) & Defects Per Million (DPM) projects.
Education
Bachelor of Science - Automation & Control Systems
Moscow Aviation Institue
Moscow 04.2001 -
Pre Russian Programme -
UniKL Malaysian Institute of Aviation
Selangor 04.2001 -
Malaysian Certificate of Education -
Sekolah Menengah Sultan Abdul Halim
Kedah 04.2001 -
Skills
Fault Isolation
Failure Analysis
UNIX Environment
Data Analysis
Test Methodology
Python
Accomplishments
MPE Division Recognition Award Q4'24
- For successfully increasing direct failure analysis (DFA) rate from 37% to 60% on client products, surpassing the DFA goal by 10% with a success rate of 78% in finding defect through physical FA
CQN Labs Department Award Q1'23
- For identifying ICX DCU state Array DFT test coverage gap in SDE (Silent Data Error) TSX (Transactional Synchronization Extensions) failures with 200 DPM Class impact
Customer First Award Q4'22
- In recognition for consistently driving for root cause, issue escalation and customer reliability risk assessment by reopening Haswell inner die cracking 2021 L1 MRB
CQN Division Recognition Award Q4'22
- For the development of the EDC/SiLYA workflow supporting FSM LYA involving multiple Die Sort sites and products
CQN Division Recognition Award Q1'22
- In recognition of seminal work on SDE Si characterization to establish a process defect and fub-level SDE defect pareto.
Division Recognition Award Q1'22
- In recognition for the intense and flawless execution of 20K CPX units through CSM - the team completed the RV demonstrating the equivalency between F32 vs F24 and achieved F24 CSM elimination ahead of schedule to avoid impacting capacity
Reference
Lee, Jin Yee | jin.yee.lee@intel.com
Engineering Manager, Intel Corp
+60125592469
Timeline
Reject Validation Engineer
Intel Microelectronics Sdn Bhd
04.2024 - Current
Failure Analysis Engineer
Intel Technology Sdn Bhd
03.2015 - 03.2024
Bachelor of Science - Automation & Control Systems
Moscow Aviation Institue
04.2001 -
Pre Russian Programme -
UniKL Malaysian Institute of Aviation
04.2001 -
Malaysian Certificate of Education -
Sekolah Menengah Sultan Abdul Halim
04.2001 -
Similar Profiles
SF TsenSF Tsen
SW Enabling and Optimization Engineering Manager at Intel Microelectronics Sdn. Bhd.SW Enabling and Optimization Engineering Manager at Intel Microelectronics Sdn. Bhd.
NORAINI JALILNORAINI JALIL
Electrical Engineer at SmartSurgn Sdn Bhd, Seri KembanganElectrical Engineer at SmartSurgn Sdn Bhd, Seri Kembangan
KARTIKEY RAMESHBHAI PARMARKARTIKEY RAMESHBHAI PARMAR
Senior Software Engineering Manager at Intel Microelectronics (M) Sdn. Bhd.Senior Software Engineering Manager at Intel Microelectronics (M) Sdn. Bhd.